Added d510d510

Signed-off-by: Damien Zammit <damien@zamaudio.com>

4 files changed, 88 insertions, 8 deletions

diff --git a/SerialICE/simba/chipset/intel_bars.lua b/SerialICE/simba/chipset/intel_bars.lua
index 63feb23..3a93f71 100644
--- a/SerialICE/simba/chipset/intel_bars.lua
+++ b/SerialICE/simba/chipset/intel_bars.lua
@@ -90,6 +90,12 @@ dev_i945 = {
 	bar = {},
 }
 
+dev_pineview = {
+	pci_dev = pci_bdf(0,0,0,0),
+	name = "Pineview",
+	bar = {},
+}
+
 function northbridge_i945()
 	add_mem_bar(dev_i945, 0x40, "EPBAR", 4*1024)
 	add_mem_bar(dev_i945, 0x44, "MCHBAR", 16*1024)
@@ -107,4 +113,12 @@ function northbridge_i946()
 	pci_cfg32_hook(dev_i945, 0x60, "PCI", i945_pcie_bar)
 end
 
+function northbridge_pineview()
+	add_mem_bar(dev_pineview, 0x40, "EPBAR", 4*1024)
+	add_mem_bar(dev_pineview, 0x48, "MCHBAR", 16*1024)
+	add_mem_bar(dev_pineview, 0x68, "DMIBAR", 4*1024)
+	add_mem_bar(dev_pineview, 0x60, "PCIEXBAR", 4*1024)
+	pci_cfg32_hook(dev_pineview, 0x60, "PCI", i945_pcie_bar)
+
+end
 
diff --git a/SerialICE/simba/cpu.lua b/SerialICE/simba/cpu.lua
index 10a7fe4..c23067c 100644
--- a/SerialICE/simba/cpu.lua
+++ b/SerialICE/simba/cpu.lua
@@ -113,11 +113,20 @@ function multicore_post(f, action)
 	local rin = action.rin
 	-- Set number of cores to 1 on Core Duo and Atom to trick the
 	-- firmware into not trying to wake up non-BSP nodes.
-	if not action.write and rin.eax == 0x01 then
+	if not action.write and rin.eax == 0x01 and not rin.ecx == 0x79 then
 		rout.ebx = (0xff00ffff & rout.ebx);
 		rout.ebx = (0x00010000 | rout.ebx);
 		return fake_action(f, action, 0)
 	end
+	-- Set number of cores to 1 on Atom when probed for initial apic id
+	if not action.write and rin.eax == 0x04 then
+		rout.eax = (0x03ffffff & rout.eax);
+		return fake_action(f, action, 0)
+	end
+	if not action.write and rin.eax == 0x01 and rin.ecx == 0x79 then
+		rout.ebx = (0xff00ffff & rout.ebx);
+		return fake_action(f, action, 0)
+	end
 	return skip_filter(f, action)
 end
 
diff --git a/SerialICE/simba/mainboard/intel_d510mo.lua b/SerialICE/simba/mainboard/intel_d510mo.lua
new file mode 100644
index 0000000..b843dec
--- /dev/null
+++ b/SerialICE/simba/mainboard/intel_d510mo.lua
@@ -0,0 +1,57 @@
+function mainboard_io_read(f, action)
+	return skip_filter(f, action)
+end
+
+
+function mainboard_io_write(f, action)
+--	if action.addr == 0xcf8 or action.addr == 0xcfc then
+--		ignore_action(f, action)
+--		return drop_action(f, action, 0)
+--	end
+	return skip_filter(f, action)
+end
+
+function mainboard_io_pre(f, action)
+	if action.write then
+		return mainboard_io_write(f, action)
+	else
+		return mainboard_io_read(f, action)
+	end
+end
+
+function mainboard_io_post(f, action)
+	if action.addr == 0x80 and not action.write then
+		return true
+	end
+end
+
+filter_mainboard = {
+	name = "D510MO",
+	pre = mainboard_io_pre,
+	post = mainboard_io_post,
+	base = 0x0,
+	size = 0x100000
+}
+
+load_filter("i82801")
+load_filter("intel_bars")
+
+function do_mainboard_setup()
+--	do_default_setup()
+
+	enable_hook(io_hooks, filter_pci_io_cfg)
+	enable_hook(mem_hooks, filter_lapic)
+	enable_hook(mem_hooks, filter_ioapic)
+
+	enable_hook(cpumsr_hooks, filter_intel_microcode)
+	enable_hook(cpuid_hooks, filter_multiprocessor)
+
+	enable_hook_pc80()
+	enable_hook_i82801gx()
+
+	northbridge_pineview()
+
+--	enable_ram()
+	new_car_region(0xfef00000, 0x2000)
+
+end
diff --git a/SerialICE/simba/user_env.lua b/SerialICE/simba/user_env.lua
index ff9f64d..25b375e 100644
--- a/SerialICE/simba/user_env.lua
+++ b/SerialICE/simba/user_env.lua
@@ -1,12 +1,12 @@
 -- Set to "true" to show all memory and IO access in output
-log_everything = false
+log_everything = true
 
 -- Set to "false" to show undecoded access for the specified class
-hide_rom_access = true
+hide_rom_access = false
 hide_ram_low = true
 hide_ram_high = true
 hide_smi_vga = true
-hide_car = true
+hide_car = false
 hide_pci_io_cfg = true
 hide_pci_mm_cfg = true
 hide_nvram_io = true
@@ -14,19 +14,19 @@ hide_i8042_io = false
 hide_i8237_io = true
 hide_i8254_io = true
 hide_i8259_io = true
-hide_superio_cfg = true
+hide_superio_cfg = false
 hide_smbus_io = true
-hide_mainboard_io = true
+hide_mainboard_io = false
 
 -- Use lua table for NVram
 -- RTC registers 0x0-0xd go to HW
 cache_nvram = false
 
 -- SMSC 0x07, Winbond 0x06 ?
-DEFAULT_SUPERIO_LDN_REGISTER = 0x07
+DEFAULT_SUPERIO_LDN_REGISTER = 0x06
 
 -- FIXME: Use bios file image size here.
-rom_size = 4 * 1024 * 1024
+rom_size = 1024 * 1024
 rom_base = 0x100000000 - rom_size
 
 -- We refrain from backing up most of memory in Qemu because Qemu would