diff options
author | Damien Zammit <damien@zamaudio.com> | 2016-09-12 03:59:01 +1000 |
---|---|---|
committer | Damien Zammit <damien@zamaudio.com> | 2016-09-12 03:59:01 +1000 |
commit | 5ddd5252a095608f985cb1ae55eb277908dd76de (patch) | |
tree | f88e4de46655e14cce507b0a20fe34234cee7160 | |
parent | fe8cef41e786e1bbc004205b02632c965da452f1 (diff) |
Add service request to read ROM contents (hack)
Signed-off-by: Damien Zammit <damien@zamaudio.com>
-rw-r--r-- | firmware/servicereq.c | 15 | ||||
-rw-r--r-- | firmware/smu.c | 4 | ||||
-rw-r--r-- | firmware/smu.h | 1 |
3 files changed, 17 insertions, 3 deletions
diff --git a/firmware/servicereq.c b/firmware/servicereq.c index 8f8f8a3..a05d37a 100644 --- a/firmware/servicereq.c +++ b/firmware/servicereq.c @@ -5616,12 +5616,22 @@ end: return; } +void read_rom_hack(void) +{ + // Read a byte of the ROM at an address that autoincrements every read + // and save it to the scratch register above the post code. + // Will wrap around at 0x10000 bytes. + static u16 wrappedromaddress = 0; + u32 oldpostcode = read32(0xe0003024) & 0xff; + write32(0xe0003024, ((u32)read8(wrappedromaddress++) << 8) | oldpostcode); +} + void smu_service_request(unsigned int e3) { static ddiphy_t ddiphy = {{0}}; static u32 bapm = 0; - int requestid; + u32 requestid; requestid = e3; requestid &= 0x1fffe; @@ -5715,6 +5725,9 @@ void smu_service_request(unsigned int e3) case SMC_MSG_DISABLE_BAPM: set_bapm(OFF, &bapm, &bapm); break; + case SMC_MSG_READ_ROM_HACK: + read_rom_hack(); + break; default: break; } diff --git a/firmware/smu.c b/firmware/smu.c index 557acba..7c3e32d 100644 --- a/firmware/smu.c +++ b/firmware/smu.c @@ -34,11 +34,11 @@ void main(void) /* clear all pending interrupts */ asm volatile ("wcsr ip, %0"::"r"(0xffffffff)); - + /* tell x86 that interrupts are ready */ write32(0xe0003004, INTACK | INTDONE); write32(0x1f380, 1); - + SMU_POST(0xcb); while (1) { diff --git a/firmware/smu.h b/firmware/smu.h index 1c1f74b..6b52daf 100644 --- a/firmware/smu.h +++ b/firmware/smu.h @@ -50,6 +50,7 @@ typedef unsigned int u32; #define SMC_MSG_PCIE_PLLSWITCH 27 #define SMC_MSG_ENABLE_BAPM 32 #define SMC_MSG_DISABLE_BAPM 33 +#define SMC_MSG_READ_ROM_HACK 99 #define MICO32_CPU_CLOCK_MHZ (25000000) #define MICO_SLEEP_MICROSEC (MICO32_CPU_CLOCK_MHZ/11000000) |